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Quick-Return Linkage

Specifications

Informal

A Quick-Return Linkage (QRL for short) has two input terminals (a and d) and two output terminals (b and c). Input a and output b alternate (together forming a passive handshake channel), as do output c and input d (together forming an active handshake channel). Every 4 phases abab match 4 phases cdcd, the first two phases of ab enclose the first two phases of cd, the remaining phases may occur in parallel, constituting the `quick return' (to zero voltage level).

XDI

Schematic diagram for a Quick-Return Linkage:

[Zoom|FIG]

XDI state graph for a Quick-Return Linkage:

[Zoom|FIG]

Specification in XDI model.

Verdect

Specification in Verdect:


define QRL( a?, b!, c!, d? ) =
       pref ( a? ; *[ c! ; d? ; b! ; a?
                    ; ((b! ; a?) || (c! ; d?))
                    ]
            )
end
Also available through this link

DI Algebra

No information available

Properties

XDI Report.

Implementations

DI Decompositions

No information available

Using Boolean Gates

No information available

Using Transistors

No information available

Generalizations

No information available

Miscellaneous

No information available

References


Last modified at Fri Nov 20 10:11:41 1998
Encyclopaedia of Delay-Insensitive Systems
Copyright © 1995-1998 Tom Verhoeff / Tom.Verhoeff@acm.org