Encyclopedia of Delay-Insensitive Systems (EDIS)

Bibliography

[async-bib]

The Asynchronous Bibliography is a bibliography database, in BibTeX format, with hundreds of references in the area of asynchronous circuit design. Notes: Download compressed file. Search. E-mail maintainer: async-bib@win.tue.nl.

[Berkel92]

Kees van Berkel. Handshake Circuits: An Intermediary between Communicating Processes and VLSI. Dissertation, Eindhoven University of Technology, Department of Computing Science. May 1992. Note: Rewritten as [Berkel93c].

[Berkel93c]

Kees van Berkel. Handshake Circuits: An Asynchronous Architecture for VLSI Programming. Cambridge University Press, 1993. Note: Based on [Berkel92].

[Brown90]

Geoffrey M. Brown. Towards Truly Delay-Insensitive Circuit Realizations of Process Algebras. In Proceedings of the Workshop on Designing Correct Circuits. Geraint Jones and Mary Sheeran (eds.), Springer-Verlag, 1990.

[Brzozowski95]

Janusz A. Brzozowski and Carl-Johan H. Seger. Asynchronous Circuits. Springer-Verlag, 1995.

[Clark67]

Wesley A. Clark. Macromodular computer systems. In AFIPS Conference Proceedings: 1967 Spring Joint Computer Conference, volume 30, pages 335-336, Atlantic City, NJ, 1967. Academic Press.

[Clark74]

Wesley A. Clark and Charles E. Molnar. Macromodular computer systems. Chapter 3 (pages 45-85) in Computers and Biomedical Research, volume IV, Ralph W. Stacy and Bruce D. Waxman (Eds.). Academic Press, 1974.

[Dickson74]

Christine E. Dickson. A Macromodule User's Manual. Technical Report No. 25, Computer Systems Laboratory, Washington University, St. Louis, Missouri, 1974.

[Ebergen87]

Jo C. Ebergen. Translating Programs into Delay-Insensitive Circuits. Dissertation, Eindhoven University of Technology, Department of Computing Science. October 1987. Note: Also published as [Ebergen89].

[Ebergen89]

Jo C. Ebergen. Translating Programs into Delay-Insensitive Circuits, CWI Tract #56. Centre for Mathematics and Computer Science, 1989. Note: Originally published as [Ebergen87].

[Ebergen92]

Jo C. Ebergen and Ad M.G. Peeters. Modulo-N Counters: Design and Analysis of Delay-Insensitive Circuits. In Proc. Int. workshop on designing correct circuits at Lyngby, Staunstrup and Sharp (eds.), pages 27-46. Elsevier 1992.

[Josephs90a]

Mark B. Josephs and Jan Tijmen Udding. An algebra for delay-insensitive circuits. In Proc. International Workshop on Computer Aided Verification (eds. Robert P. Kurshan and Edmund M. Clarke), Lecture Notes in Computer Science, volume 531, pages 343-352. Springer-Verlag, 1990.

[Josephs90b]

Mark B. Josephs and Jan Tijmen Udding. Delay-insensitive circuits: an algebraic approach to their design. In ConCur '90: Theories of Concurrency, Unification and Extension (eds. J. C. M. Baeten and J. W. Klop), Lecture Notes in Computer Science, volume 458, pages 342-366. Springer-Verlag, 1990.

[Josephs93a]

Mark B. Josephs and Jan Tijmen Udding. An overview of DI algebra for delay-insensitive circuits. In Proc. Hawaii International Conf. Systems Sciences, volume I. IEEE Computer Society Press, 1993.

[Josephs93c]

Mark B. Josephs and Jan Tijmen Udding and Yelio Yantchev. Handshake Algebra, Technical Report SBU-CISM-93-1 of Southbank University, December 1993.

[Korver93]

Wilbert Körver. A Discrete Switch-Level Circuit Model That Uses 4-Valued Node States. Dissertation, Eindhoven University of Technology, Department of Computing Science. December 1993.

[Lucassen94]

Paul G. Lucassen. A Denotational Model and Composition Theorems for a Calculus of Delay-Insensitive Specifications. Dissertation, University of Groningen, Department of Computing Science. May 1994.

[Miller65b]

R. E. Miller. Sequential Circuits and Machines: Volume 2 of Switching Theory. Wiley, 1965.

[Chaney73]

T. J. Chaney and C. E. Molnar. Anomalous Behavior of Synchronizer and Arbiter Circuits. IEEE Transactions on Computers, C-22(4):421-422, April 1973.

[Molnar74]

Charles E. Molnar (Chief Editor). Macromodular Computer Design, Final Report. Computer Systems Laboratory, Washington University, St. Louis, Missouri, 1974.

[Ornstein67]

Severo M. Ornstein, Mishell J. Stucki, and Wesley A. Clark. A Functional Description of Macromodules. In AFIPS Conference Proceedings: 1967 Spring Joint Computer Conference, volume 30, pages 337-355, Atlantic City, NJ, 1967. Academic Press.

[Peeters96]

Ad Peeters. Single-Rail Handshake Circuits. Dissertation, Eindhoven University of Technology, Department of Computing Science. June 1996.

[Schols92]

Huub Schols. Delay-Insensitive Communication. Dissertation, Eindhoven University of Technology, Department of Computing Science. December 1992.

[Seitz80]

C. Seitz System Timing. In C.A. Mead and L.A. Conway, editors, Chapter 7 in: Introduction to VLSI systems, Addison-Wesley, 1980.

[Snepscheut83]

Jan L. A. van de Snepscheut. Trace Theory and VLSI Design, Dissertation, Eindhoven University of Technology, Department of Computing Science. September 1983. Note: Also published as [Snepscheut85].

[Snepscheut85]

Jan L. A. van de Snepscheut. Trace Theory and VLSI Design, volume 200 in Lecture Notes in Computer Science. Springer-Verlag, 1985. Note: originally published as [Snepscheut83].

[Sproull94]

Robert F. Sproull, Ivan E. Sutherland, and Charles E. Molnar. The Counterflow Pipeline Processor Architecture. IEEE Design & Test of Computers, 11(3):48-59, Fall 1994.

[Sutherland89]

Ivan E. Sutherland. Micropipelines, Communications of the ACM, 32(6):720-738, June 1989. (1988 Turing Award Lecture)

[Udding84]

Jan Tijmen Udding. Classification and Composition of Delay-Insensitive Circuits. Dissertation, Eindhoven University of Technology, Department of Computing Science. September 1984.

[Verhoeff88]

Tom Verhoeff. Delay-insensitive codes: an overview. Distributed Computing 3(1):1-8, 1988.

[Verhoeff94]

Tom Verhoeff. A Theory of Delay-Insensitive Systems. Dissertation, Eindhoven University of Technology, Department of Computing Science. May 1994.

[Verhoeff98]

Tom Verhoeff. Analyzing Specifications for Delay-Insensitive Circuits. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 172-183, 1998.

Last modified at Mon Oct 26 11:52:07 1998