Wire

Specifications

Informal

A Wire has one input terminal and one output terminal. It copies input signals to output signals. Input and output signals alternate.

XDI

Schematic diagram for a Wire:

[Zoom|FIG]

XDI state graph for a Wire:

[Zoom|FIG]

Specification in XDI model:

(AND/IF_1.0
  (NFA
    (NAME Wire)
    (SYMBOLS 
      (a INPUT) (b OUTPUT)
    )

    (STATES
      (0 INITIAL BOX)
      (1 TRANSIENT)
    )
    (TRANSITIONS
      (0 1 a)
      (1 0 b)
    )
  )
)

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Verdect

Specification in Verdect:



define WIRE( a?, b! ) =
       pref *[ a?; b! ]
end

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DI Algebra

Specification in DI Algebra:



W = a?; b!; W

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Properties

XDI Report

W(a; b) / a = I(a; b)

Implementations

DI Decompositions

No information available

Using Boolean Gates

No information available

Using Transistors

No information available

Generalizations

A Wire can be generalized in numerous ways, for instance to a k-Fork, a k-Merge, a k-Join, and a k-Toggle, For each of these cases a Wire is obtained for k=1.

Miscellaneous

In Section 2.2.1 of [Ebergen89, p. 29], the Wire is referred to as WIRE component.

References

[Ebergen89, p. 29]

Wire

Informal

DI Decompositions

Using Boolean Gates

Using Transistors

Last modified at Fri Nov 20 11:38:55 1998